The invention relates to a stencil mask for high- and ultrahigh-energy implantation that has implantation openings in a substrate through which the implantation energy can be projected onto a wafer that will be implanted. The invention also relates to a method set up for fabricating a stencil mask of this type.
New kinds of vertical high-voltage silicon components (those that withstand voltages greater than 300 V) require vertical, pillar-type and finely patterned doping regions in the epitaxial drift zone. These so-called compensation components reduce the on resistance by up to one order of magnitude. To fabricate such vertical finely patterned doping regions, from today""s standpoint high-energy implantation (up to 25 MeV boron) using silicon stencil masks appears to be the only method actually suitable in order both to expand the manufacturing capacity and to reduce the costs to a significant extent.
From a technical standpoint, fabricating suitable stencil masks for high-energy implantation is problematic since compensation components are based on the principle of balanced doping between the vertical compensation pillars and the basic doping of the epitaxial layer. Deviations in this balance by a few percent already lead to a drastic reduction in the blocking capability. Stencil masks are usually fabricated by phototechnological patterning of SOI wafers and subsequent trench etching. In this case, the trench depth for a 600 V component is approximately 35 xcexcm. Dry-chemical etching machines which are commercially available nowadays achieve a reproducibility of the sidewall inclination of the etched trenches of about 0.5xc2x0 to 1.0xc2x0 on an 8 inch wafer. The conditions and the problems of such a relatively thick stencil mask M are illustrated in the form of a diagrammatic cross section in the accompanying FIG. 7. FIG. 7 illustrates how the implantation opening diameter 2r, which is to be regarded as the critical dimension CD, changes from its target value 2rtarget to an actual value 2rACTUAL if the angle xcex1trench which specifies the sidewall inclination increases by the value xcex94xcex1trench. The effective CD dimension specifies a so-called xe2x80x9cprojected rangexe2x80x9d Rp, which is equivalent to a given implantation energy E.
Table 1 illustrated in the accompanying FIG. 8 shows the dependence of the dose fluctuation of the implantation energy relative to the target dose in the event of deviation of the trench sidewall angle xcex1trench in the stencil mask M in accordance with FIG. 7.
The cumulative fluctuation (error propagation) lies in the range from xc2x140 to 60% of the target dose. Cumulative fluctuations of xc2x110 to 15% are acceptable for the device (compensation component) to be fabricated. This value already takes account of fluctuations in the resist dimension and in the doping of the epitaxial layer.
The crucial disadvantage of the stencil mask patterned in accordance with FIG. 7 is that the effective CD dimensions associated with the respective implantation energies are only controlled by the upper opening dimension of the trench and the trench angle xcex1trench. In particular for high implantation energies and correspondingly thick stencil masks, even slight deviations from the ideal trench angle give rise to a major effect on the critical dimension CD.
To date, such compensation components have been exclusively fabricated using the so-called construction technique:
First an n-doped epitaxial layer having a thickness of several micrometers is deposited on the substrate. Using a resist mask, a p-type doping is subsequently introduced by a low-energy implantation. In this connection, particular attention must be paid to the accuracy of the resist dimension of the resist mask since this is the parameter that determines the number of implanted ions, and consequently, the balance between the p-type and the n-type doping. The whole process, including epitaxial deposition, phototechnology and implantation, is repeated until the pillar height corresponding to the required withstand voltage has been constructed. The final sub-process includes a diffusion step that causes the implantation regions to diffuse together vertically.
Stencil masks are currently used primarily for ion projection lithography. In this technique, only very low-energy ions are used. The problem of fluctuation of trench angles in the case of very deep trenches does not arise in this case, since the silicon mask only has a thickness of 3.0 xcexcm. The dimensionally accurate upper part of the trench extends merely to a depth of 150 nm.
It is accordingly an object of the invention to provide a stencil mask for high- and ultrahigh-energy implantation and a method for fabricating the stencil mask which overcome the above-mentioned disadvantages of the prior art apparatus and methods of this general type.
Following what has been said above, it is an object of the invention to provide a stencil mask that is suitable for a high- and ultrahigh-energy implantation and that significantly reduces the fluctuations shown in Table 1 (FIG. 8). Thus, it is an object of the invention to enable the development of a high-energy implantation technology for such compensation components in an expedient manner.
In order to achieve the above stated object, the invention proposes departing from the concept of the simple stencil mask in which the implantation openings are defined and formed for all energies by using a CD dimension (Critical Dimension) and a single trench etching process, and instead defining a dedicated dimensionally accurate mask for each implantation energy. In the case of this mask, the critical dimension of the implantation openings is defined in a manner dependent on the respective implantation energy. In a particular embodiment, a stencil mask is composed of a plurality of individual dimensionally accurate masks, with the result that this combined stencil mask is suitable for different implantation energies. The critical dimension of the implantation openings present in a plurality of steps or stages are in each case coordinated with the required implantation energy.
Instead of this, however, it is also possible to provide a dedicated dimensionally accurate mask for each implantation energy and to use the mask in each case for an implantation with a specific energy. In the event of a changeover of the energy, the mask is changed, too. By way of example, for a compensation component constructed from five layers, it is then necessary to fabricate five separate masks with openings whose critical dimension CD is in each case coordinated with the energy used for the implantation.
Preferably, the stencil mask is constructed on an SOI (Silicon on Insulator) base material or is composed of such an SOI base material.
The following method is particularly advantageously appropriate for fabricating a stencil mask for the high- and ultrahigh-energy implantation:
I. Providing an SOI base material with an SOI layer thickness adapted to the respective ion penetration depth, for example 5 xcexcm for 3 MeV boron, 35 xcexcm for 20 MeV boron.
II. Etching retrograde openings from the front side of the SOI wafer as far as the SOI oxide layer. This means that for a stencil mask, for example, for a 20 MeV implantation, the first 1.2 xcexcm (+ safety margins) of this opening (trench) must be exact. The rest of the trench need only satisfy very undemanding requirements.
III. The mask is made transparent from the rear side by wet-chemical etching, for example.
IV. The stencil mask is used as an implantation mask, for example, by bonding or precisely positioning the mask in front of the wafer that will be implanted in such a way that the front side of the mask points in the direction of the wafer that will be implanted.
With the foregoing and other objects in view there is provided, in accordance with the invention, a stencil mask for high- and ultrahigh-energy implantation of semiconductor wafers. The stencil mask includes a substrate formed with implantation openings through which ions that will be implanted onto a wafer can be projected with a implantation energy onto the wafer. Each of the implantation openings have a diameter that is defined in a manner dependent on the implantation energy.
In accordance with an added feature of the invention, the substrate forms an individual stencil mask; and each of the implantation openings have a single diameter for the implantation energy.
In accordance with an additional feature of the invention, the substrate forms a single stencil mask with a plurality of dimensionally accurate individual stencil masks; and each of the plurality of the dimensionally accurate individual stencil masks is formed with implantation openings having diameters that are coordinated with an implantation energy of a respective implantation step of a multi-step implantation with different implantation energies.
In accordance with another feature of the invention, the substrate is constructed on an SOI base material.
In accordance with a further feature of the invention, the substrate is made from an SOI base material.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for fabricating a stencil mask for high-and ultrahigh-energy implantation that includes steps of: constructing a stencil mask having implantation openings formed therein, the openings being provided for projecting ions therethrough that will be implanted onto a wafer; and forming the implantation openings with diameters being determined by a respective implantation energy of the ions that will be projected therethrough.
In accordance with an added mode of the invention, the stencil mask is constructed by performing the steps of: forming a first oxide layer, which is accurately dimensionally prepatterned, on a silicon layer of a silicon-on-insulator wafer having a silicon-on-insulator base material by performing a step selected from the group consisting of a depositing step and a growing step, and subsequently performing a trench etching of the silicon layer using an oxide layer of the silicon-on-insulator wafer as a stop and using oxide regions on the silicon layer as dimensionally accurate hard masks.
In accordance with an additional mode of the invention, the stencil mask is constructed such that the implantation openings have a plurality of different diameters by: performing a plurality of steps that are each either a depositing step or a growing step to construct a plurality of silicon layers and a plurality of dimensionally accurately patterned oxide layers such that each one the oxide layers is located above a respective one of the silicon layers, such that each one of the oxide layers has implantation openings that are centered in relation to respective implantation openings in others of the oxide layers, and such that the diameters of the implantation openings in each respective one of the oxide layers are larger than the diameters of the implantation openings in the oxide layers below the respective one of the oxide layers. Subsequently, starting from a topmost one of the oxide layers, and stopping on the oxide layer of the silicon-on-insulator wafer, a trench etching is performed through each one of the silicon layers in which all of the patterned oxide layers act as dimensionally accurate hard masks lying one above another.
In accordance with another mode of the invention, the method includes: subsequently patterning the silicon-on-insulator wafer from a rear side of the wafer; forming large window openings by performing a step selected from the group consisting of wet-chemical etching and dry-chemical etching through the silicon layer and the oxide layer of the silicon-on insulator wafer; and providing the stencil mask with a front side that can positioned over a semiconductor wafer that will be implanted by configuring the stencil mask in a flipped position.
In accordance with a further mode of the invention, the stencil mask is constructed by: a) applying and dimensionally accurately patterning a first mask on a silicon layer of an SOI wafer, the first mask being selected from the group consisting of a hard mask and a resist mask, b) through openings in the first mask, performing a trench etching in the silicon layer of the SOI wafer, c) subsequently closing off each etched trench with a plug and after removing the first mask, leveling a surface of the silicon layer, d) performing steps a)-c) as often as necessary, and e) patterning a rear side of the SOI wafer to form large windows by performing a step selected from the group consisting of a wet-chemical etching step and a dry-chemical etching step.
In accordance with a further added mode of the invention, the stencil mask is constructed using a stepped trench etching of a silicon layer of an SOI base material in a desired target thickness, by performing the following steps: Applying and patterning a first mask on the silicon layer of the SOI wafer. The first mask is either a resist mask or a hard mask. Subsequently, forming a trench having trench walls and a trench bottom by performing a first trench etching into the silicon layer down to a first depth and applying an oxide layer to cover the trench walls and the trench bottom. Subsequently etching the oxide layer at the trench bottom to produce a dimensionally accurate opening leading to the silicon layer. Subsequently performing a second trench etching in the trench down to a second selected target depth and depositing a further oxide layer in the trench. Subsequently, performing a further spacer etching of the further oxide layer at a trench bottom. Performing a renewed trench etching as far as an SOI oxide of the SOI base material. Subsequently, patterning a wafer rear side by performing either a wet-chemical etching step or a dry-chemical etching to form large windows, and wet-chemically etching the SOI oxide and side wall oxides of the stepped trench.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a stencil mask for high- and ultrahigh-energy implantation, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.